The CPU generates 32-bit address for accessing data in the memory.
(i) How many Lines and sets does the cache have?
(ii) How many entries are required for tag?
(iii) How many bits of tags are required in each entry in the tag array?
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The CPU generates 32-bit address for accessing data in the memory.
(i) How many Lines and sets does the cache have?
(ii) How many entries are required for tag?
(iii) How many bits of tags are required in each entry in the tag array?