6(a) Design the bus connecting with a CPU to connect four RAM chips of size 256*8 bits each and a ROM chip of 512*8 bit size. Assume that CPU has 8-bit data bus and 16-bit address bus.
6(a) Design the bus connecting with a CPU to connect four RAM chips of size 256*8 bits each and a ROM chip of 512*8 bit size. Assume that CPU has 8-bit data bus and 16-bit address bus.
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